Difference between revisions of "SGX drivers"
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The driver is looking for this file in current working directory first, and then in /etc/ . | The driver is looking for this file in current working directory first, and then in /etc/ . | ||
| + | |||
| + | ==Pandora 3D acceleration capabilities (PowerVR SGX)== | ||
| + | |||
| + | This is based on the specification of the OMAP 35xx chip found at [http://focus.ti.com/dsp/docs/dspsupporttechdocs.tsp?sectionId=3&tabId=409&techDoc=6&familyId=1526&documentCategoryId=6&Input3=Go]: | ||
| + | |||
| + | The main points of interest from the below list are: | ||
| + | * OpenGL-ES 1.1 and 2.0 | ||
| + | * OpenVG 1.0.1 support | ||
| + | * Bilinear, trilinear, and anisotropic texture filtering | ||
| + | * Nonsquare textures | ||
| + | * 2048 by 2048 maximum texture / framebuffer size | ||
| + | * 4x multisampling | ||
| + | * 16x full scene anti-aliasing | ||
| + | * Multithreaded shader engine with 16 simultaneous threads of execution and up to 64 simultaneous data instances. | ||
| + | |||
| + | Full feature list: | ||
| + | * PowerVR SGX Main Features | ||
| + | ** 2D graphics, 3D graphics, vector graphics, and programmable GPU functions | ||
| + | ** Tile-based architecture | ||
| + | ** Universal scalable shader engine (USSE) – multithreaded engine incorporating vertex shader and fragment shader functionality | ||
| + | ** Advanced shader feature set – in excess of Microsoft VS3.0, PS3.0, and OGL2.0 | ||
| + | ** Industry standard API support - OpenGL-ES 1.1 and 2.0, OpenVG 1.0.1 | ||
| + | ** Fine-grained task switching, load balancing, and power management | ||
| + | ** Advanced geometry direct memory access (DMA) driven operation for minimum CPU interaction | ||
| + | ** Programmable high-quality image anti-aliasing | ||
| + | ** PowerVR SGX core MMU for address translation from the core virtual address to the external physical address (up to 4GB address range) | ||
| + | ** Fully virtualized memory addressing for OS operation in a unified memory architecture | ||
| + | ** 2D operations via the 3D pipeline | ||
| + | * SGX 3D features | ||
| + | ** Deferred pixel shading | ||
| + | ** On-chip tile floating point depth buffer | ||
| + | ** 8-bit stencil with on-chip tile stencil buffer | ||
| + | ** 8 parallel depth/stencil tests per clock | ||
| + | ** Scissor test | ||
| + | ** Texture support: | ||
| + | *** Cube map | ||
| + | *** Projected textures | ||
| + | *** 2D textures | ||
| + | *** nonsquare textures | ||
| + | ** Texture formats: | ||
| + | *** RGBA 8888,565,1555 | ||
| + | *** Monochromatic 8, 16, 16f, 32f, 32int | ||
| + | *** Dual channel, 8:8, 16:16, 16f:16f | ||
| + | *** Compressed textures PVR-TC1, PVR-TC2, ETC1 | ||
| + | *** Programmable support for all YUV formats | ||
| + | ** Resolution support: | ||
| + | *** Frame buffer maximum size = 2048 x 2048 | ||
| + | *** Texture maximum size = 2048 x 2048 | ||
| + | ** Texture filtering: | ||
| + | *** Bilinear, tri-linear, anisotropic | ||
| + | *** Independent minimum and maximum control | ||
| + | ** Anti-aliasing: | ||
| + | *** 4x multisampling | ||
| + | *** Up to 16x full scene anti-aliasing | ||
| + | *** Programmable sample positions | ||
| + | ** Indexed primitive list support | ||
| + | *** Bus mastered | ||
| + | ** Programmable vertex DMA | ||
| + | ** Render to texture: | ||
| + | *** Including twiddled formats | ||
| + | *** Auto MipMap generation | ||
| + | ** Multiple on-chip render targets (MRT). Note: Performance is limited when the on-chip memory is not available. | ||
| + | * Universal Scalable Shader Engine – Key Features - ''The (USSE) is the engine core of the PowerVR SGX architecture and supports a broad range of instructions.'' | ||
| + | ** Single programming model: | ||
| + | *** Multithreaded with 16 simultaneous execution threads and up to 64 simultaneous data instances | ||
| + | *** Zero-cost swapping in, and out, of threads | ||
| + | *** Cached program execution model | ||
| + | *** Dedicated pixel processing instructions | ||
| + | *** Dedicated video encode/decode instructions | ||
| + | ** SIMD execution unit supporting operations in: | ||
| + | *** 32-bit IEEE-compliant float | ||
| + | *** 2-way 16-bit fixed point | ||
| + | *** 4-way 8-bit integer | ||
| + | *** 32-bit bit-wise (logical only) | ||
| + | ** Static and dynamic flow control: | ||
| + | *** Subroutine calls | ||
| + | *** Loops | ||
| + | *** Conditional branches | ||
| + | *** Zero-cost instruction predication | ||
| + | ** Procedural geometry: | ||
| + | *** Allows generation of primitives | ||
| + | *** Effective geometry compression | ||
| + | *** High-order surface support | ||
| + | ** External data access: | ||
| + | *** Permits reads from main memory using cache | ||
| + | *** Permits writes to main memory | ||
| + | *** Data fence facility | ||
| + | *** Dependent texture reads | ||
==Useful links== | ==Useful links== | ||
[http://processors.wiki.ti.com/index.php/OMAP35x_Graphics_SDK_Release_Notes_Archive TI release notes]<br> | [http://processors.wiki.ti.com/index.php/OMAP35x_Graphics_SDK_Release_Notes_Archive TI release notes]<br> | ||
[http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/index.html TI release downloads] | [http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/index.html TI release downloads] | ||
Revision as of 17:27, 13 September 2013
Contents
Releases
TI has released several SGX driver versions over time, that are based on Imagination Technologies SGX DDK for Linux, hence there are two version numbers associated with single release: TI release version and Imgtech DDK version. In each release kernel driver sources are provided and precompiled libraries providing OpenGL/OpenVG functionality.
On pandora, different driver versions can be installed using a pnd from this page.
| TI version | SGX DDK version | Date | Notes |
|---|---|---|---|
| 3.00.00.08a | 1.3.13.1607 | 2009-06-30 | |
| 3.00.00.09 | 1.3.13.1832 | 2009-11-16 | |
| 3.01.00.02 | 1.4.14.2514 | 2009-11-30 | |
| 3.01.00.06 | 1.4.14.2616 | 2010-04-06 | ES5 introduced |
| 3.01.00.07 | 1.4.14.2616 | 2010-08-18 | |
| 4.00.00.01 | 1.4.14.2616 | 2010-09-09 | last working ES2 |
| 4.03.00.01 | 1.6.16.3977 | 2011-01-27 | |
| 4.03.00.02 | 1.6.16.3977 | 2011-03-10 | |
| 4.04.00.01 | 1.6.16.4117 | 2011-07-27 | introduces DRI2 dependency |
| 4.04.00.02 | 1.6.16.4117 | 2011-08-03 | |
| 4.04.00.03 | 1.6.16.4117 | 2011-08-30 | |
| 4.04.00.04 | ? | 2011-09-29 | internal only (engineering drop) release |
| 4.05.00.01 | 1.6.16.4117 | 2011-10-25 | 4.04 + build fixes, no more ES2 libs |
| 4.05.00.02 | 1.6.16.4117 | 2011-10-27 | |
| 4.05.00.03 | 1.6.16.4117 | 2011-12-14 | |
| 4.06.00.01 | 1.7.17.783851 | 2012-04-03 | |
| 4.06.00.02 | 1.7.17.867897 | 2012-05-30 | |
| 4.06.00.03 | 1.7.17.867897 | 2012-06-18 | |
| 4.07.00.01 | 1.7.17.867897 | 2012-09-06 | missing libs |
| 4.08.00.01 | 1.9.19.2139099 | 2012-09-28 | "tested on AM parts only" |
| 4.08.00.02 | 1.9.19.2188537 | 2012-12-10 | "tested on AM parts only" |
Android releases
| TI version | SGX DDK version |
|---|---|
| 3.01.00.03 | 1.5.15.2766 |
| 4.03.00.01 | ? |
| 4.03.01.00 | ? |
Library variants
Each TI release comes with different set of libraries for different SGX chip revisions. TI SGX drivers use weird naming of SGX chip versions which is inconsistent with OMAP chip revision or SGX chip revision names. As various pandora versions use different OMAP chip versions, this may become rather confusing, so hopefully this table can help.
| SoC name | SoC version | SGX core revision | TI diver name | Pandora name |
|---|---|---|---|---|
| OMAP3530 | ES2.1 | 1.0.3 | ES2.0 | CC/256M |
| OMAP3530 | ES3.1 | 1.2.1 | ES3.0 | Rebirth |
| DM3730 | ES1.x | 1.2.5 | ES5.0 | 1GHz |
Developer info
Driver operation modes
The drivers seem to have 2 modes of operation - "framebuffer mode" and "X mode". Framebuffer mode appears to be noticeably faster in some cases, presumably because in X mode the driver is rendering to offscreen buffer and then manually blitting to X window, even if it's fullscreen. Also at the time of this writing, drivers starting from 4.04.00.01 only work in framebuffer mode due to some unsolved DRI2 issues.
The mode is selected depending on how EGL is initialized, if you use EGL_DEFAULT_DISPLAY for eglGetDisplay() and NULL window for eglCreateWindowSurface(), you get framebuffer mode, else if you pass real display and window handles to those functions, you'll get X mode. Note that in framebuffer mode the driver will fight with X for display, so you need to create fullscreen window to stop X from redrawing (SDL can be used for that).
Double buffering in GL
It is unclear when the driver decides to use double buffering, sometimes it does, sometimes it doesn't (the later is more usual), so there is often tearing visible. It is possible to force the driver to use double buffering with by using a file named powervr.ini with this content:
[default]
WindowSystem=libpvrPVR2D_FLIPWSEGL.so
The driver is looking for this file in current working directory first, and then in /etc/ .
Pandora 3D acceleration capabilities (PowerVR SGX)
This is based on the specification of the OMAP 35xx chip found at [1]:
The main points of interest from the below list are:
- OpenGL-ES 1.1 and 2.0
- OpenVG 1.0.1 support
- Bilinear, trilinear, and anisotropic texture filtering
- Nonsquare textures
- 2048 by 2048 maximum texture / framebuffer size
- 4x multisampling
- 16x full scene anti-aliasing
- Multithreaded shader engine with 16 simultaneous threads of execution and up to 64 simultaneous data instances.
Full feature list:
- PowerVR SGX Main Features
- 2D graphics, 3D graphics, vector graphics, and programmable GPU functions
- Tile-based architecture
- Universal scalable shader engine (USSE) – multithreaded engine incorporating vertex shader and fragment shader functionality
- Advanced shader feature set – in excess of Microsoft VS3.0, PS3.0, and OGL2.0
- Industry standard API support - OpenGL-ES 1.1 and 2.0, OpenVG 1.0.1
- Fine-grained task switching, load balancing, and power management
- Advanced geometry direct memory access (DMA) driven operation for minimum CPU interaction
- Programmable high-quality image anti-aliasing
- PowerVR SGX core MMU for address translation from the core virtual address to the external physical address (up to 4GB address range)
- Fully virtualized memory addressing for OS operation in a unified memory architecture
- 2D operations via the 3D pipeline
- SGX 3D features
- Deferred pixel shading
- On-chip tile floating point depth buffer
- 8-bit stencil with on-chip tile stencil buffer
- 8 parallel depth/stencil tests per clock
- Scissor test
- Texture support:
- Cube map
- Projected textures
- 2D textures
- nonsquare textures
- Texture formats:
- RGBA 8888,565,1555
- Monochromatic 8, 16, 16f, 32f, 32int
- Dual channel, 8:8, 16:16, 16f:16f
- Compressed textures PVR-TC1, PVR-TC2, ETC1
- Programmable support for all YUV formats
- Resolution support:
- Frame buffer maximum size = 2048 x 2048
- Texture maximum size = 2048 x 2048
- Texture filtering:
- Bilinear, tri-linear, anisotropic
- Independent minimum and maximum control
- Anti-aliasing:
- 4x multisampling
- Up to 16x full scene anti-aliasing
- Programmable sample positions
- Indexed primitive list support
- Bus mastered
- Programmable vertex DMA
- Render to texture:
- Including twiddled formats
- Auto MipMap generation
- Multiple on-chip render targets (MRT). Note: Performance is limited when the on-chip memory is not available.
- Universal Scalable Shader Engine – Key Features - The (USSE) is the engine core of the PowerVR SGX architecture and supports a broad range of instructions.
- Single programming model:
- Multithreaded with 16 simultaneous execution threads and up to 64 simultaneous data instances
- Zero-cost swapping in, and out, of threads
- Cached program execution model
- Dedicated pixel processing instructions
- Dedicated video encode/decode instructions
- SIMD execution unit supporting operations in:
- 32-bit IEEE-compliant float
- 2-way 16-bit fixed point
- 4-way 8-bit integer
- 32-bit bit-wise (logical only)
- Static and dynamic flow control:
- Subroutine calls
- Loops
- Conditional branches
- Zero-cost instruction predication
- Procedural geometry:
- Allows generation of primitives
- Effective geometry compression
- High-order surface support
- External data access:
- Permits reads from main memory using cache
- Permits writes to main memory
- Data fence facility
- Dependent texture reads
- Single programming model:
