Difference between revisions of "Configuring ext signals"

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=Pin functions (mux)=
 
=Pin functions (mux)=
By default UART2 pins are set up as GPIOs, and UART3 as an UART.
 
  
==Changing pin functions under 3.2 kernel==
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By default the UART2 pins are set up as GPIOs, and UART3 is set up as an UART. The following describes how to change pin functions under a 3.2 kernel.
Described in the [http://boards.openpandora.org/index.php?/topic/4497-talking-to-the-gpios-on-the-ext-connector/page__st__40#entry195457 following forum post]
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 +
==Setup==
 +
 
 +
As root,
 +
 
 +
<source lang="bash">
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# mkdir /debug
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# mount -t debugfs none /debug
 +
</source>
 +
 
 +
In the /debug/omap_mux directory which appears, the files relevant to the EXT connector are uart2_cts, uart2_rts, uart2_rx, uart2_tx, uart3_rx_irrx, uart3_tx_irtx. They are mapped to the pad configuration registers. Reading one of these files reports the current configuration of the pin. Writing the appropriate pattern to the file changes the configuration of the pin.
 +
 
 +
==Pad Configuration Register==
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 +
As described in OMAP35x Technical Reference Manual (Rev. Y), section 7.4.4 [http://www.ti.com/product/omap3530/technicaldocuments]
 +
 
 +
{|class="wikitable" border="1" cellpadding="1" cellspacing="0" style="font-size: 90%; border:1px solid gray; border-collapse: collapse; text-align: left; width: 100%;"
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|- style="background: #ececec"
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! Bits
 +
! Name
 +
! Comments
 +
|-
 +
| 15
 +
| WAKEUPEVENT
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|
 +
|-
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| 14
 +
| WAKEUPENABLE
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|
 +
|-
 +
| 13
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| OFFPULLTYPESELECT
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|
 +
|-
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| 12
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| OFFPULLUDENABLE
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|
 +
|-
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| 11
 +
| OFFOUTVALUE
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|
 +
|-
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| 10
 +
| OFFOUTENABLE
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|
 +
|-
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| 9
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| OFFENABLE
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|
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|-
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| 8
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| INPUTENABLE
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| 0: output only. 1: bidirectional.
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|-
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| 7,6,5
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| RESERVED
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|
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|-
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| 4
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| PULLTYPESELECT
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| 0: pull-down. 1: pull-up.
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|-
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| 3
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| PULLUDENABLE
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| 0: pull not active. 1: pull active if pin not configured as output.
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|-
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| 2,1,0
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| MUXMODE
 +
| See table below.
 +
|}
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 +
==Mux modes==
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 +
{|class="wikitable" border="1" cellpadding="1" cellspacing="0" style="font-size: 90%; border:1px solid gray; border-collapse: collapse; text-align: center; width: 100%;"
 +
|- style="background: #ececec"
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! Mode 0
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! Mode 1
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! Mode 2
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! Mode 3
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! Mode 4
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! Mode 5
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! Mode 6
 +
! Mode 7
 +
|-
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| uart2_cts
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| mcbsp3_dx
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| gpt9_pwm_evt
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| NA
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| gpio_144
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| NA
 +
| NA
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| safe_mode
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|-
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| uart2_rts
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| mcbsp3_dr
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| gpt10_pwm_evt
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| NA
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| gpio_145
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| NA
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| NA
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| safe_mode
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|-
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| uart2_tx
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| mcbsp3_clkx
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| gpt11_pwm_evt
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| NA
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| gpio_146
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| NA
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| NA
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| safe_mode
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|-
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| uart2_rx
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| mcbsp3_fsx
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| gpt8_pwm_evt
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| NA
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| gpio_147
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| NA
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| NA
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| safe_mode
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|-
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| uart3_rx_irrx
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| NA
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| NA
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| NA
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| gpio_165
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| NA
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| NA
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| safe_mode
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|-
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| uart3_tx_irtx
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| NA
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| NA
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| NA
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| gpio_166
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| NA
 +
| NA
 +
| safe_mode
 +
|}
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==Example==
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 +
Example of changing UART2_RTS from GPIO to UART mode [http://boards.openpandora.org/topic/4497-talking-to-the-gpios-on-the-ext-connector/?p=195457]:
 +
 
 +
<source lang="bash">
 +
# cat /debug/omap_mux/uart2_rts
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name: uart2_rts.gpio_145 (0x48002176/0x146 = 0x010c), b ab25, t NA
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mode: OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE4
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signals: uart2_rts | mcbsp3_dr | gpt10_pwm_evt | NA | gpio_145 | NA | NA | safe_mode
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 +
# echo 0x0108 > /debug/omap_mux/uart2_rts
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# cat /debug/omap_mux/uart2_rts
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name: uart2_rts.uart2_rts (0x48002176/0x146 = 0x0108), b ab25, t NA
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mode: OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0
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signals: uart2_rts | mcbsp3_dr | gpt10_pwm_evt | NA | gpio_145 | NA | NA | safe_mode
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</source>
 +
 
 +
The value was changed from 0x010c to 0x0108. In both numbers, bit8 is 1 for input enable, bit4 is 0 for pull-down, and bit3 is 1 for pull enable. Bits 2,1,0 changed from 4 to 0, which changed the mux mode from 4 to 0.
  
 
=Power supply=
 
=Power supply=

Revision as of 20:35, 24 May 2014

Pin functions (mux)

By default the UART2 pins are set up as GPIOs, and UART3 is set up as an UART. The following describes how to change pin functions under a 3.2 kernel.

Setup

As root,

# mkdir /debug
# mount -t debugfs none /debug

In the /debug/omap_mux directory which appears, the files relevant to the EXT connector are uart2_cts, uart2_rts, uart2_rx, uart2_tx, uart3_rx_irrx, uart3_tx_irtx. They are mapped to the pad configuration registers. Reading one of these files reports the current configuration of the pin. Writing the appropriate pattern to the file changes the configuration of the pin.

Pad Configuration Register

As described in OMAP35x Technical Reference Manual (Rev. Y), section 7.4.4 [1]

Bits Name Comments
15 WAKEUPEVENT
14 WAKEUPENABLE
13 OFFPULLTYPESELECT
12 OFFPULLUDENABLE
11 OFFOUTVALUE
10 OFFOUTENABLE
9 OFFENABLE
8 INPUTENABLE 0: output only. 1: bidirectional.
7,6,5 RESERVED
4 PULLTYPESELECT 0: pull-down. 1: pull-up.
3 PULLUDENABLE 0: pull not active. 1: pull active if pin not configured as output.
2,1,0 MUXMODE See table below.

Mux modes

Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7
uart2_cts mcbsp3_dx gpt9_pwm_evt NA gpio_144 NA NA safe_mode
uart2_rts mcbsp3_dr gpt10_pwm_evt NA gpio_145 NA NA safe_mode
uart2_tx mcbsp3_clkx gpt11_pwm_evt NA gpio_146 NA NA safe_mode
uart2_rx mcbsp3_fsx gpt8_pwm_evt NA gpio_147 NA NA safe_mode
uart3_rx_irrx NA NA NA gpio_165 NA NA safe_mode
uart3_tx_irtx NA NA NA gpio_166 NA NA safe_mode

Example

Example of changing UART2_RTS from GPIO to UART mode [2]:

# cat /debug/omap_mux/uart2_rts
name: uart2_rts.gpio_145 (0x48002176/0x146 = 0x010c), b ab25, t NA
mode: OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE4
signals: uart2_rts | mcbsp3_dr | gpt10_pwm_evt | NA | gpio_145 | NA | NA | safe_mode

# echo 0x0108 > /debug/omap_mux/uart2_rts
# cat /debug/omap_mux/uart2_rts
name: uart2_rts.uart2_rts (0x48002176/0x146 = 0x0108), b ab25, t NA
mode: OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0
signals: uart2_rts | mcbsp3_dr | gpt10_pwm_evt | NA | gpio_145 | NA | NA | safe_mode

The value was changed from 0x010c to 0x0108. In both numbers, bit8 is 1 for input enable, bit4 is 0 for pull-down, and bit3 is 1 for pull enable. Bits 2,1,0 changed from 4 to 0, which changed the mux mode from 4 to 0.

Power supply

Currently always set to supply 2.8V, changing this requires patching bootloaders (xload and u-boot).

This is connected to VAUX3 supply on PMIC, with these programmable voltages (200mA max): 1.5V, 1.8V, 2.5V, 2.8V and 3.0V, with 2.8V as default.

warning: at the time of this writing, both bootloaders (xload and u-boot) set this to 2.8V unconditionally, so don't rely on this providing other voltages during reboot until you patch both bootloaders.

GPIOs

Can be controlled using GPIO sysfs class device, as described in beagleboard tutorials here.

UART3

On older firmwares, kernel messages are directed there. SuperZaxxon or later have that disabled.

On all firmwares released so far terminal with a shell is attached to UART3. The port runs at 115200 8N1 baud rate.

Disabling kernel messages

To disable kernel mesages, you need to edit kernel boot arguments. Probably easiest way to do it is to create autoboot.txt and place on root directory of a card in slot1 with this content:

setenv bootargs ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw rootflags=bulk_read

Alternatives are using u-boot environment (configure through USB or UART3 serial before system boots up) or patching and reflashing u-boot itself.

Disabling attached terminal

For this you need to edit /etc/inittab on pandora rootfs and comment out these lines:

#S0:2345:once:/sbin/getty 115200 ttyS0
#O2:2345:once:/sbin/getty 115200 ttyO2